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 LTC6911-1/LTC6911-2 Dual Matched Amplifiers with Digitally Programmable Gain in MSOP
FEATURES
s
DESCRIPTIO
s s s s s s s s s s
3-Bit Digital Gain Control: (Inverting Gains of 0, 1, 2, 5, 10, 20, 50 and 100V/V) -1 Option (Inverting Gains of 0, 1, 2, 4, 8, 16, 32 and 64V/V) -2 Option Two Matched Programmable Gain Amplifiers Channel-to-Channel Gain Matching of 0.1dB (Max) Rail-to-Rail Input Range Rail-to-Rail Output Swing Single or Dual Supply: 2.7V to 10.5V Total 11MHz Gain Bandwidth Product Input Noise: 10nV/Hz Total System Dynamic Range to 120dB Input Offset Voltage: 2mV, Gain of 10 Low Profile 10-Lead MSOP Package
The LTC(R)6911 is a family of low noise digitally programmable gain amplifiers (PGAs) that are easy to use and occupy very little PC board space. The matched gain of both channels is adjustable using a 3-bit parallel interface to select voltage gains of 0, 1, 2, 5, 10, 20, 50 and 100V/ V (LTC6911-1) and 0, 1, 2, 4, 8, 16, 32 and 64V/V (LTC6911-2). All gains are inverting. The LTC6911 family consists of two matched inverting amplifiers with rail-to-rail outputs. When operated with unity gain, they will also process rail-to-rail input signals. A half-supply reference generated internally at the AGND pin supports single power supply applications. Operating from single or split supplies from 2.7V to 10.5V, the LTC6911 family is offered in a 10-lead MSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
s s s s
Data Acquisition Systems Dynamic Gain Changing Automatic Ranging Circuits Automatic Gain Control
TYPICAL APPLICATIO
V+ 2.7V TO 10.5V 7
0.1F
9
DIGITAL INPUT GAIN IN V/V G2 G1 G0 LTC6911-1 LTC6911-2 000 0 0 001 -1 -1 010 -2 -2 011 -5 -4 100 -10 -8 101 -20 -16 110 -50 -32 111 -100 -64
VINA AGND 1F
1
10
VOUTA = GAIN * VINA
GAIN (dB)
2
LTC6911-X
VINB
3
8
VOUTB = GAIN * VINB
691112 TA01
-10 100
4 G0
5 G1
6 G2
U
Frequency Response (LTC6911-1)
50 40 VS = 10V, VIN = 5mVRMS GAIN OF -100 (DIGITAL INPUT 111) 30 GAIN OF -50 (DIGITAL INPUT 110) GAIN OF -20 (DIGITAL INPUT 101) 20 GAIN OF -10 (DIGITAL INPUT 100) 10 GAIN OF -5 (DIGITAL INPUT 011) GAIN OF -2 (DIGITAL INPUT 010) 0 GAIN OF -1 (DIGITAL INPUT 001) 1k 10k 100k FREQUENCY (Hz) 1M 10M
691112 TA02
U
U
sn691112 691112fs
1
LTC6911-1/LTC6911-2
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW INA AGND INB G0 G1 1 2 3 4 5 10 9 8 7 6 OUTA V- OUTB V+ G2
Total Supply Voltage (V+ to V-) .............................. 11V Input Current ..................................................... 10mA Operating Temperature Range (Note 2) LTC6911C-1/LTC6911C-2 .................. - 40C to 85C LTC6911I-1/LTC6911I-2 .................... - 40C to 85C LTC6911H-1/LTC6911H-2 ................ - 40C to 125C Specified Temperature Range (Note 3) LTC6911C-1/LTC6911C-2 .................. - 40C to 85C LTC6911I-1/LTC6911I-2 .................... - 40C to 85C LTC6911H-1/LTC6911H-2 ................ - 40C to 125C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
MS PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 150C, JA = 230C/W
ORDER PART NUMBER LTC6911CMS-1 LTC6911IMS-1 LTC6911HMS-1 LTC6911CMS-2 LTC6911IMS-2 LTC6911HMS-2
MS PART MARKING LTAHK LTAHM LTBCF LTAHH LTAHJ LTBCG
Consult LTC Marketing for parts specified with wider operating temperature ranges.
GAI SETTI GS A D PROPERTIES
Table 1 (LTC6911-1)
NOMINAL VOLTAGE GAIN Volts/Volt (dB) 0 -120 -1 0 -2 6 -5 14 -10 20 -20 26 -50 34 -100 40 MAXIMUM LINEAR INPUT RANGE (VP-P) Dual 5V Single 5V Single 3V Supply Supply Supply 10 5 3 10 5 3 5 2.5 1.5 2 1 0.6 1 0.5 0.3 0.5 0.25 0.15 0.2 0.1 0.06 0.1 0.05 0.03 NOMINAL INPUT IMPEDANCE (k) (Open) 10 5 2 1 1 1 1 DIGITAL INPUTS G1 G0 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1
G2 0 0 0 0 1 1 1 1
Table 2 (LTC6911-2)
DIGITAL INPUTS G1 G0 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1 NOMINAL VOLTAGE GAIN Volts/Volt (dB) 0 -120 -1 0 -2 6 -4 12 -8 18.1 -16 24.1 -32 30.1 -64 36.1 MAXIMUM LINEAR INPUT RANGE (VP-P) Dual 5V Single 5V Single 3V Supply Supply Supply 10 5 3 10 5 3 5 2.5 1.5 2.5 1.25 0.75 1.25 0.625 0.375 0.625 0.3125 0.188 0.3125 0.156 0.094 0.156 0.078 0.047 NOMINAL INPUT IMPEDANCE (k) (Open) 10 5 2.5 1.25 1.25 1.25 1.25
sn691112 691112fs
G2 0 0 0 0 1 1 1 1
2
U
W
U
U
WW U
W U
U
LTC6911-1/LTC6911-2
ELECTRICAL CHARACTERISTICS
PARAMETER LTC6911-1/LTC6911-2 Total Supply Voltage (VS) Supply Current per Channel CONDITIONS
The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted.
C/I GRADES MIN TYP MAX
q
MIN 2.7
H GRADE TYP MAX 10.5 2.1 2.5 3.1 3.1 12 60 20 100 30 190 10 50 10 90 20 180 27 35 3.25 4.00 5.00 5.00 35 125 45 190 60 290 25 90 35 175 45 270
UNITS V mA mA mA mA mV mV mV mV mV mV mV mV mV mV mV mV mA mA
2.7 2.1 2.5 3.1 3.1 12 60 20 100 30 190 10 50 10 90 20 180 27 35 2.45 0.55 0.75 - 4.30 55 55 60 80 75 80 12 16 2.5
10.5 3.15 3.75 4.65 4.65 30 110 40 170 50 260 20 80 30 160 40 250
VS = 2.7V, VINA = VINB = VAGND VS = 5V, VINA = VINB = VAGND VS = 5V, VINA = VINB = 0V, Pins 4, 5, 6 = -4.5V or 5V VS = 5V, VINA = VINB = 0V, Pin 4 = 4.5V, Pins 5, 6 = 0.5V VS = 2.7V, RL = 10k Tied to Mid Supply VS = 2.7V, RL = 500 Tied to Mid Supply VS = 5V, RL = 10k Tied to Mid Supply VS = 5V, RL = 500 Tied to Mid Supply VS = 5V, RL = 10k Tied to 0V VS = 5V, RL = 500 Tied to 0V
q q q q q q q q q q q q q q q q q q q q q q q q q
Output Voltage Swing LOW (Note 4)
Output Voltage Swing HIGH (Note 4)
VS = 2.7V, RL = 10k Tied to Mid Supply VS = 2.7V, RL = 500 Tied to Mid Supply VS = 5V, RL = 10k Tied to Mid Supply VS = 5V, RL = 500 Tied to Mid Supply VS = 5V, RL = 10k Tied to 0V VS = 5V, RL = 500 Tied to 0V
Output Short-Circuit Current (Note 5) AGND Open-Circuit Voltage AGND (Common Mode) Input Voltage Range AGND Rejection (i.e., Common Mode Rejection or CMRR) Power Supply Rejection Ratio (PSRR) Slew Rate Signal Attenuation at Gain = 0 Setting Digital Input "High" Voltage
VS = 2.7V VS = 5V VS = 5V VS = 2.7V VS = 5V VS = 5V VS = 2.7V, VAGND = 1.1V to 1.6V VS = 5V, VAGND = - 2.5V to 2.5V VS = 2.7V to 5V VS = 5V, VOUTA = VOUTB = 1.1V to 3.9V VS = 5V, VOUTA = VOUTB = 1.4V Gain = 0 (Digital Inputs 000), f = 20kHz VS = 2.7V VS = 5V VS = 5V VS = 2.7V VS = 5V VS = 5V VS = 2.7V, Pins 4, 5, 6 = 2.43V VS = 5V, Pins 4, 5, 6 = 4.5V VS = 5V, Pins 4, 5, 6 = 4.5V VS = 2.7V, Pins 4, 5, 6 = 0.27V VS = 5V, Pins 4, 5, 6 = 0.5V VS = 5V, Pins 4, 5, 6 = 0.5V
2.55 1.60 3.65 3.20
2.45 0.55 0.75 - 4.30 50 50 57
2.5
2.55 1.60 3.65 3.20
V V V V dB dB dB V/s V/s dB V V V
80 75 80 12 16 - 120
q q q q q q q q q q q q q
- 120 2.43 4.50 4.50 0.27 0.50 0.50 1 5 10 1 5 10 2.43 4.50 4.50
Digital Input "Low" Voltage
0.27 0.50 0.50 1 5 10 1 5 10
V V V A A A A A A
Digital Input "High" Current
Digital Input "Low" Current
sn691112 691112fs
3
LTC6911-1/LTC6911-2
ELECTRICAL CHARACTERISTICS
PARAMETER LTC6911-1 Only Voltage Gain (Note 6) CONDITIONS
The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted.
C/I GRADES MIN TYP MAX
q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q
MIN
H GRADE TYP MAX
UNITS dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB
VS = 2.7V, Gain = 1, RL = 10k VS = 2.7V, Gain = 1, RL = 500 VS = 2.7V, Gain = 2, RL = 10k VS = 2.7V, Gain = 5, RL = 10k VS = 2.7V, Gain = 10, RL = 10k VS = 2.7V, Gain = 10, RL = 500 VS = 2.7V, Gain = 20, RL = 10k VS = 2.7V, Gain = 50, RL = 10k VS = 2.7V, Gain = 100, RL = 10k VS = 2.7V, Gain = 100, RL = 500 VS = 5V, Gain = 1, RL = 10k VS = 5V, Gain = 1, RL = 500 VS = 5V, Gain = 2, RL = 10k VS = 5V, Gain = 5, RL = 10k VS = 5V, Gain = 10, RL = 10k VS = 5V, Gain = 10, RL = 500 VS = 5V, Gain = 20, RL = 10k VS = 5V, Gain = 50, RL = 10k VS = 5V, Gain = 100, RL = 10k VS = 5V, Gain = 100, RL = 500 VS = 5V, Gain = 1, RL = 10k VS = 5V, Gain = 1, RL = 500 VS = 5V, Gain = 2, RL = 10k VS = 5V, Gain = 5, RL = 10k VS = 5V, Gain = 10, RL = 10k VS = 5V, Gain = 10, RL = 500 VS = 5V, Gain = 20, RL = 10k VS = 5V, Gain = 50, RL = 10k VS = 5V, Gain = 100, RL = 10k VS = 5V, Gain = 100, RL = 500
-0.07 0 0.07 -0.11 -0.02 0.07 5.94 6.01 6.08 13.85 13.95 14.05 19.7 19.93 20.1 19.6 19.85 20.1 25.75 25.94 26.1 33.5 33.8 39.0 39.6 37.4 38.9 34.1 40.1 40.1
-0.08 0 0.07 -0.13 -0.02 0.07 5.93 6.01 6.08 13.8 13.95 14.05 19.65 19.93 20.1 19.45 19.85 20.1 25.65 25.94 26.1 33.4 38.8 36.5 33.8 39.6 38.9 34.1 40.1 40.1
-0.08 0.01 0.08 -0.11 -0.01 0.07 5.95 6.02 6.09 13.8 13.96 14.1 19.8 19.94 20.1 19.6 19.87 20.1 25.8 25.94 26.1 33.5 33.84 34.1 39.3 39.7 38.0 39.2 -0.06 0.01 -0.10 0.00 5.95 6.02 40.1 40.1 0.08 0.08 6.09
-0.09 0.01 0.08 -0.13 -0.01 0.07 5.94 6.02 6.09 13.78 13.96 14.1 19.75 19.94 20.1 19.45 19.87 20.1 25.75 25.94 26.1 33.4 33.84 34.1 39.1 37.0 39.7 39.2 40.1 40.1 0.08 0.08 6.09
-0.07 0.01 -0.11 0.00 5.94 6.02
13.8 13.96 14.1 19.8 19.94 20.1 19.7 19.91 20.1 25.8 25.95 26.1 33.7 33.87 34.1 39.4 39.8 38.8 39.5 -0.1 0.02 -0.1 0.02 -0.1 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.20 0.02 -1.00 0.02 40.2 40.1 0.1 0.1 0.1 0.15 0.15 0.15 0.15 0.15 0.20 1.00
13.79 13.96 14.1 19.75 19.94 20.1 19.60 19.91 20.1 25.75 25.95 26.1 33.60 33.87 34.1 39.25 39.8 38.00 39.5 -0.1 -0.1 -0.1 0.02 0.02 0.02 40.2 40.1 0.1 0.1 0.1 0.15 0.15 0.15 0.15 0.15 0.20 1.50
Channel-to-Channel Voltage Gain Match
VS = 2.7V, Gain = 1, RL = 10k VS = 2.7V, Gain = 1, RL = 500 VS = 2.7V, Gain = 2, RL = 10k VS = 2.7V, Gain = 5, RL = 10k VS = 2.7V, Gain = 10, RL = 10k VS = 2.7V, Gain = 10, RL = 500 VS = 2.7V, Gain = 20, RL = 10k VS = 2.7V, Gain = 50, RL = 10k VS = 2.7V, Gain = 100, RL = 10k VS = 2.7V, Gain = 100, RL = 500
-0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.20 0.02 -1.50 0.02
sn691112 691112fs
4
LTC6911-1/LTC6911-2
ELECTRICAL CHARACTERISTICS
PARAMETER LTC6911-1 Only Channel-to-Channel Voltage Gain Match CONDITIONS
The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted.
C/I GRADES MIN TYP MAX
q q q q q q q q q q q q q q q q q q q q
MIN -0.1 -0.1 -0.1
H GRADE TYP MAX 0.02 0.02 0.02 0.1 0.1 0.1 0.15 0.15 0.15 0.15 0.15 0.2 1.2 0.1 0.1 0.1 0.15 0.15 0.15 0.15 0.15 0.2 0.9
UNITS dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB ppm/C ppm/Cppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C dB dB dB
VS = 5V, Gain = 1, RL = 10k VS = 5V, Gain = 1, RL = 500 VS = 5V, Gain = 2, RL = 10k VS = 5V, Gain = 5, RL = 10k VS = 5V, Gain = 10, RL = 10k VS = 5V, Gain = 10, RL = 500 VS = 5V, Gain = 20, RL = 10k VS = 5V, Gain = 50, RL = 10k VS = 5V, Gain = 100, RL = 10k VS = 5V, Gain = 100, RL = 500 VS = 5V, Gain = 1, RL = 10k VS = 5V, Gain = 1, RL = 500 VS = 5V, Gain = 2, RL = 10k VS = 5V, Gain = 5, RL = 10k VS = 5V, Gain = 10, RL = 10k VS = 5V, Gain = 10, RL = 500 VS = 5V, Gain = 20, RL = 10k VS = 5V, Gain = 50, RL = 10k VS = 5V, Gain = 100, RL = 10k VS = 5V, Gain = 100, RL = 500
-0.1 0.02 -0.1 0.02 -0.1 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.2 0.02 -0.8 0.02 -0.1 0.02 -0.1 0.02 -0.1 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.2 0.02 -0.6 0.02 2 -1.5 -11 -30 -38 -70 -140 1.0 1.0 0.2 1.0 0.4 3.0 3.0 108 107 93
0.1 0.1 0.1 0.15 0.15 0.15 0.15 0.15 0.2 0.8 0.1 0.1 0.1 0.15 0.15 0.15 0.15 0.15 0.2 0.6
-0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.2 -1.2 -0.1 -0.1 -0.1 0.02 0.02 0.02 0.02 0.02
-0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.2 -0.9 0.02 0.02 2 -1.5 -11 -30 -38 -70 -140 1.0 1.0 0.2 1.0 0.4 3.0 3.0 108 107 93
Gain Temperature Coefficient
VS = 5V, Gain = 1, RL = Open VS = 5V, Gain = 2, RL = Open VS = 5V, Gain = 5, RL = Open VS = 5V, Gain = 10, RL = Open VS = 5V, Gain = 20, RL = Open VS = 5V, Gain = 50, RL = Open VS = 5V, Gain = 100, RL = Open
Channel-to-Channel Gain Temperature VS = 5V, Gain = 1, RL = Open Coefficient Match VS = 5V, Gain = 2, RL = Open VS = 5V, Gain = 5, RL = Open VS = 5V, Gain = 10, RL = Open VS = 5V, Gain = 20, RL = Open VS = 5V, Gain = 50, RL = Open VS = 5V, Gain = 100, RL = Open Channel-to-Channel Isolation (Note 7) f = 200kHz VS = 5V, Gain = 1, RL = 10k VS = 5V, Gain = 10, RL = 10k VS = 5V, Gain = 100, RL = 10k Gain = 1 Gain = 10 Gain = 1 Gain = 10
q q
Offset Voltage Magnitude Referred to INA or INB Pins (Note 8) Offset Voltage Magnitude Drift Referred to INA or INB Pins (Note 8)
2.0 1.1 12 6.6
22 12
2.0 1.1 20 11
22 14
mV mV V/C V/C
sn691112 691112fs
5
LTC6911-1/LTC6911-2
ELECTRICAL CHARACTERISTICS
PARAMETER LTC6911-1 Only DC Input Resistance at INA or INB Pins (Note 9) DC VINA or VINB = 0V Gain = 0 Gain = 1 Gain = 2 Gain = 5 Gain > 5 Gain = 1 Gain = 2 Gain = 5 Gain > 5 DC VINA or VINB = 0V Gain = 0 Gain = 1 Gain = 2 Gain = 5 Gain = 10 Gain = 20 Gain = 50 Gain = 100 CONDITIONS
The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted.
C/I GRADES MIN TYP MAX MIN H GRADE TYP MAX UNITS
q q q q q q q q q
>100 10 5 2 1 10 5 2 1 0.4 0.7 1.0 1.9 3.4 6.4 15 30
>100 10 5 2 1 10 5 2 1 0.4 0.7 1.0 1.9 3.4 6.4 15 30 18 6 11 7.5 12.3 8.5 6.1 5.2 5.0 4.5 3.8 28 19 14 12 11.5 10.8 9.9 - 90 0.003 - 82 0.008 18
M k k k k MHz VRMS VRMS VRMS VRMS VRMS VRMS VRMS VRMS nV/Hz nV/Hz nV/Hz nV/Hz nV/Hz nV/Hz nV/Hz dB % dB %
DC Input Resistance Match RINA - RINB
DC Small-Signal Output Resistance at OUTA or OUTB Pins
Gain-Bandwidth Product Wideband Noise (Referred to Input)
Gain = 100, fIN = 200kHz f = 1kHz to 200kHz Gain = 0 (Output Noise Only) Gain = 1 Gain = 2 Gain = 5 Gain = 10 Gain = 20 Gain = 50 Gain = 100 f = 50kHz Gain = 1 Gain = 2 Gain = 5 Gain = 10 Gain = 20 Gain = 50 Gain = 100 Gain = 10, fIN = 10kHz, VOUT = 1VRMS Gain = 10, fIN = 100kHz, VOUT = 1VRMS
q
7
11 7.5 12.3 8.5 6.1 5.2 5.0 4.5 3.8 28 19 14 12 11.5 10.8 9.9 - 90 0.003 - 82 0.008
Voltage Noise Density (Referred to Input)
Total Harmonic Distortion
sn691112 691112fs
6
LTC6911-1/LTC6911-2
ELECTRICAL CHARACTERISTICS
PARAMETER LTC6911-2 Only Voltage Gain (Note 6) CONDITIONS
The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted.
C/I GRADES MIN TYP MAX
q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q
MIN
H GRADE TYP MAX
UNITS dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB
VS = 2.7V, Gain = 1, RL = 10k VS = 2.7V, Gain = 1, RL = 500 VS = 2.7V, Gain = 2, RL = 10k VS = 2.7V, Gain = 4, RL = 10k VS = 2.7V, Gain = 8, RL = 10k VS = 2.7V, Gain = 8, RL = 500 VS = 2.7V, Gain = 16, RL = 10k VS = 2.7V, Gain = 32, RL = 10k VS = 2.7V, Gain = 64, RL = 10k VS = 2.7V, Gain = 64, RL = 500 VS = 5V, Gain = 1, RL = 10k VS = 5V, Gain = 1, RL = 500 VS = 5V, Gain = 2, RL = 10k VS = 5V, Gain = 4, RL = 10k VS = 5V, Gain = 8, RL = 10k VS = 5V, Gain = 8, RL = 500 VS = 5V, Gain = 16, RL = 10k VS = 5V, Gain = 32, RL = 10k VS = 5V, Gain = 64, RL = 10k VS = 5V, Gain = 64, RL = 500 VS = 5V, Gain = 1, RL = 10k VS = 5V, Gain = 1, RL = 500 VS = 5V, Gain = 2, RL = 10k VS = 5V, Gain = 4, RL = 10k VS = 5V, Gain = 8, RL = 10k VS = 5V, Gain = 8, RL = 500 VS = 5V, Gain = 16, RL = 10k VS = 5V, Gain = 32, RL = 10k VS = 5V, Gain = 64, RL = 10k VS = 5V, Gain = 64, RL = 500
-0.07 0 0.07 -0.11 -0.02 0.07 5.94 6.01 6.08 11.9 12.02 12.12 17.80 18.00 18.15 17.65 17.94 18.15 23.8 24.01 24.25 29.7 30 30.2 36.2 36.2 35.3 35.8 34.2 35.3
-0.08 0 0.07 -0.13 -0.02 0.07 5.93 6.01 6.08 11.88 12.02 12.12 17.75 18.00 18.15 17.55 17.94 18.15 23.75 24.01 24.25 29.65 30 30.2 36.2 36.2 35.15 35.8 33.65 35.3
-0.08 0.00 0.08 -0.10 -0.01 0.08 5.96 6.02 6.1 11.85 12.02 12.15 17.85 18.01 18.15 17.65 17.96 18.15 23.85 24.02 24.15 29.70 30.02 30.2 35.5 35.9 34.7 35.6 -0.06 0.01 -0.10 0.00 5.96 6.02 36.3 36.1 0.08 0.08 6.1
-0.09 0.00 0.08 -0.12 -0.01 0.08 5.95 6.02 6.1 11.83 12.02 12.15 17.83 18.01 18.15 17.50 17.96 18.15 23.80 24.02 24.15 29.65 30.02 30.2 35.40 35.9 34.20 35.6 -0.07 0.01 -0.11 0.00 5.95 6.02 36.3 36.1 0.08 0.08 6.1
11.9 12.03 12.15 17.85 18.02 18.15 17.80 17.99 18.15 23.85 24.03 24.15 29.85 30 30.2 35.65 36.0 36.20 35.20 35.8 36.20 -0.1 0.02 -0.1 0.02 -0.1 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.2 0.02 -0.7 0.02 0.1 0.1 0.1 0.15 0.15 0.15 0.15 0.15 0.2 0.7
11.88 12.03 12.15 17.83 18.02 18.15 17.73 17.99 18.15 23.82 24.03 24.15 29.8 30 30.2 35.55 36.0 36.20 34.80 35.8 36.20 -0.1 -0.1 -0.1 0.02 0.02 0.02 0.1 0.1 0.1 0.15 0.15 0.15 0.15 0.15 0.2 1.0
Channel-to-Channel Voltage Gain Match
VS = 2.7V, Gain = 1, RL = 10k VS = 2.7V, Gain = 1, RL = 500 VS = 2.7V, Gain = 2, RL = 10k VS = 2.7V, Gain = 4, RL = 10k VS = 2.7V, Gain = 8, RL = 10k VS = 2.7V, Gain = 8, RL = 500 VS = 2.7V, Gain = 16, RL = 10k VS = 2.7V, Gain = 32, RL = 10k VS = 2.7V, Gain = 64, RL = 10k VS = 2.7V, Gain = 64, RL = 500
-0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.15 0.02 -0.2 -1.0 0.02 0.02
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LTC6911-1/LTC6911-2
ELECTRICAL CHARACTERISTICS
PARAMETER LTC6911-2 Only CONDITIONS
The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted.
C/I GRADES MIN TYP MAX
q q q q q q q q q q q q q q q q q q q q
MIN
H GRADE TYP MAX 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 2 -1 -7 -21 -28 -40 -115 0 -0.5 0.5 0.5 1.0 4.0 4.0 110 110 93 2.0 1.1 20 11 >100 10 5 2.5 1.25 0.1 0.1 0.1 0.15 0.15 0.15 0.15 0.15 0.15 0.80 0.1 0.1 0.1 0.15 0.15 0.15 0.15 0.15 0.15 0.60
UNITS dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C dB dB dB mV mV V/C V/C M k k k k
Gain Temperature Coefficient
Channel-to-Channel Gain Temperature Coefficient Match
Channel-to-Channel Isolation (Note 7)
Offset Voltage Magnitude Referred to INA or INB Pins (Note 8) Offset Voltage Magnitude Drift Referred to INA or INB Pins (Note 8) DC Input Resistance at INA or INB Pins (Note 9)
VS = 5V, Gain = 1, RL = 10k VS = 5V, Gain = 1, RL = 500 VS = 5V, Gain = 2, RL = 10k VS = 5V, Gain = 4, RL = 10k VS = 5V, Gain = 8, RL = 10k VS = 5V, Gain = 8, RL = 500 VS = 5V, Gain = 16, RL = 10k VS = 5V, Gain = 32, RL = 10k VS = 5V, Gain = 64, RL = 10k VS = 5V, Gain = 64, RL = 500 VS = 5V, Gain = 1, RL = 10k VS = 5V, Gain = 1, RL = 500 VS = 5V, Gain = 2, RL = 10k VS = 5V, Gain = 4, RL = 10k VS = 5V, Gain = 8, RL = 10k VS = 5V, Gain = 8, RL = 500 VS = 5V, Gain = 16, RL = 10k VS = 5V, Gain = 32, RL = 10k VS = 5V, Gain = 64, RL = 10k VS = 5V, Gain = 64, RL = 500 VS = 5V, Gain = 1, RL = Open VS = 5V, Gain = 2, RL = Open VS = 5V, Gain = 4, RL = Open VS = 5V, Gain = 8, RL = Open VS = 5V, Gain = 16, RL = Open VS = 5V, Gain = 32, RL = Open VS = 5V, Gain = 64, RL = Open VS = 5V, Gain = 1, RL = Open VS = 5V, Gain = 2, RL = Open VS = 5V, Gain = 4, RL = Open VS = 5V, Gain = 8, RL = Open VS = 5V, Gain = 16, RL = Open VS = 5V, Gain = 32, RL = Open VS = 5V, Gain = 64, RL = Open f = 200kHz VS = 5V, Gain = 1, RL = 10k VS = 5V, Gain = 8, RL = 10k VS = 5V, Gain = 64, RL = 10k Gain = 1 Gain = 8 Gain = 1 Gain = 8 DC VINA or VINB = 0V Gain = 0 Gain = 1 Gain = 2 Gain = 4 Gain > 4
-0.1 -0.1 -0.1 -0.15 -0.15 -0.15 -0.15 -0.15 -0.15 -0.60 -0.1 -0.1 -0.1 -0.15 -0.15 -0.15 -0.15 -0.15 -0.15 -0.40
0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 0.02 2 -1 -7 -21 -28 -40 -115 0 -0.5 0.5 0.5 1.0 4.0 4.0 110 110 93 2.0 1.1 12 6.8 >100 10 5 2.5 1.25
0.1 0.1 0.1 0.15 0.15 0.15 0.15 0.15 0.15 0.60 0.1 0.1 0.1 0.15 0.15 0.15 0.15 0.15 0.15 0.40
-0.1 -0.1 -0.1 -0.15 -0.15 -0.15 -0.15 -0.15 -0.15 -0.80 -0.1 -0.1 -0.1 -0.15 -0.15 -0.15 -0.15 -0.15 -0.15 -0.60
q q
22 12
22 14
q q q q q
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LTC6911-1/LTC6911-2
ELECTRICAL CHARACTERISTICS
PARAMETER LTC6911-2 Only DC Input Resistance Match RINA - RINB CONDITIONS
The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted.
C/I GRADES MIN TYP MAX
q q q q
MIN
H GRADE TYP MAX 10 5 2 1 0.4 0.7 1.0 1.9 3.4 6.4 15 30 7.4 12.4 8.5 6.5 5.5 5.2 4.9 4.3 28.0 19.0 14.8 12.7 11.8 11.5 10.9 - 90 0.003 - 82 0.008 11
UNITS VRMS VRMS VRMS VRMS VRMS VRMS VRMS VRMS nV/Hz nV/Hz nV/Hz nV/Hz nV/Hz nV/Hz nV/Hz dB % dB % MHz
DC Small-Signal Output Resistance at OUTA or OUTB Pins
Wideband Noise (Referred to Input)
Voltage Noise Density (Referred to Input)
Total Harmonic Distortion
Gain = 1 Gain = 2 Gain = 4 Gain > 4 DC VINA or VINB = 0V Gain = 0 Gain = 1 Gain = 2 Gain = 4 Gain = 8 Gain = 16 Gain = 32 Gain = 64 f = 1kHz to 200kHz Gain = 0 (Output Noise Only) Gain = 1 Gain = 2 Gain = 4 Gain = 8 Gain = 16 Gain = 32 Gain = 64 f = 50kHz Gain = 1 Gain = 2 Gain = 4 Gain = 8 Gain = 16 Gain = 32 Gain = 64 Gain = 8, fIN = 10kHz, VOUT = 1VRMS Gain = 8, fIN = 100kHz, VOUT = 1VRMS
10 5 2 1 0.4 0.7 1.0 1.9 3.4 6.4 15 30 7.4 12.4 8.5 6.5 5.5 5.2 4.9 4.3 28.0 19.0 14.8 12.7 11.8 11.5 10.9 - 90 0.003 - 82 0.008 11
Gain-Bandwidth Product
Gain = 64, fIN = 200kHz
q
6
17
6
17
Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: The LTC6911C and LTC6911I are guaranteed functional over the operating temperature range of - 40C to 85C. The LTC6911H is guaranteed functional over the operating temperature range of - 40C to 125C. Note 3: The LTC6911C is guaranteed to meet specified performance from 0C to 70C. The LTC6911C is designed, characterized and expected to meet specified performance from - 40C to 85C but is not tested or QA sampled at these temperatures. LTC6911I is guaranteed to meet specified performance from - 40C to 85C. The LTC6911H is guaranteed to meet specified performance from -40C to 125C. Note 4: Output voltage swings are measured as differences between the output and the respective supply rail. Note 5: Extended operation with output shorted may cause junction temperature to exceed the 150C limit and is not recommended.
Note 6: Gain is measured with a DC large-signal test using an output excursion between approximately 30% and 70% of the total supply voltage. Note 7: Channel-to-channel isolation is measured by applying a 200kHz input signal to one channel so that its output varies 1VRMS and measuring the output voltage RMS of the other channel relative to AGND with its input tied to AGND. Isolation is calculated: IsolationA = 20 * log10 VOUTB V , IsolationB = 20 * log10 OUTA VOUTA VOUTB
Note 8: Offset voltage referred to the INA or INB input is (1 + 1/G) times the offset voltage of the internal op amp, where G is the nominal gain magnitude. See Applications Information. Note 9: Input resistance can vary by approximately 30% part-to-part at a given gain setting (input resistance match remains as specified).
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LTC6911-1/LTC6911-2 TYPICAL PERFOR A CE CHARACTERISTICS (LTC6911-1)
LTC6911-1 Gain Shift vs Temperature
0.100 0.075 0.050
GAIN CHANGE (dB)
VS = 5V OUTPUT UNLOADED GAIN = 100 40
-3dB FREQUENCY (MHz)
GAIN (dB)
0.025 GAIN = 10 0 GAIN = 1 -0.025 -0.050 -0.075 -0.100 -50 -25 50 25 TEMPERATURE (C) 0 75 100
6911 G01
LTC6911-1 Channel Isolation vs Frequency
120 CHANNEL-TO-CHANNEL ISOLATION (dB) 115 GAIN = 1 110 REJECTION (dB) 105 100 95 90 85 100k FREQUENCY (Hz)
6911 G04
VOLTAGE NOISE DENSITY (nV/Hz)
VS = 5V VOUT = 1VRMS
GAIN = 10
GAIN = 100
LTC6911-1 Distortion vs Frequency with Light Loading (RL = 10k)
THD (AMPLITUDE BELOW FUNDAMENTAL) (dB)
-40 -50 -60 -70
VS = 2.5V VOUT = 1VRMS (2.83VP-P)
THD (AMPLITUDE BELOW FUNDAMENTAL) (dB)
-30
THD + NOISE (dB)
GAIN = 100
GAIN = 10 -80 -90 -100 0 50k 100k FREQUENCY (Hz)
6911 G07
GAIN = 1
150k
10
UW
LTC6911-1 Frequency Response
50 VS = 10V, VIN = 5mVRMS GAIN OF 100 (DIGITAL INPUT 111)
LTC6911-1 -3dB Bandwidth vs Gain Setting
8.0 7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0
* * * * * *
VIN = 5mVRMS * VS = 2.7V * VS = 5V
30 GAIN OF 50 (DIGITAL INPUT 110) GAIN OF 20 (DIGITAL INPUT 101) 20 GAIN OF 10 (DIGITAL INPUT 100)
10 GAIN OF 5 (DIGITAL INPUT 011) GAIN OF 2 (DIGITAL INPUT 010) 0 GAIN OF 1 (DIGITAL INPUT 001) 1k 10k 100k FREQUENCY (Hz) 1M 10M
6911 G02
* *
10 GAIN
* *
-10 100
*
*
100
6911 G03
1
LTC6911-1 Power Supply Rejection vs Frequency
90 80 70 60 -SUPPLY 50 40 30 20 10 0
1M
LTC6911-1 Noise Density vs Frequency
VS = 2.5V GAIN = 1
100 VS = 2.5V TA = 25C INPUT REFERRED GAIN = 1 GAIN = 10 10 GAIN = 100
+SUPPLY
1k
10k
100k 1M FREQUENCY (Hz)
10M
6911 G05
1 1k
10k FREQUENCY (Hz)
100k
6911 G06
LTC6911-1 Distortion vs Frequency with Heavy Loading (RL = 500)
-30 -40 -50 GAIN = 10 -60 GAIN = 1 -70 -80 -90 -100 0 50k 100k FREQUENCY (Hz)
6911 G08
LTC6911-1 THD + Noise vs Input Voltage
-20 -30 GAIN = 100 -40 GAIN = 10 -50 -60 -70 -80 -90 fIN = 1kHz -100 VS = 5V GAIN = 1 BW = 100Hz TO 22kHz -110 10n 1m 0.1 1 10 INPUT VOLTAGE (VP-P)
6911 G09
VS = 2.5V VOUT = 1VRMS (2.83VP-P) GAIN = 100
200k
150k
200k
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LTC6911-1/LTC6911-2 TYPICAL PERFOR A CE CHARACTERISTICS (LTC6911-2)
LTC6911-2 Gain Shift vs Temperature
0.100 0.075 0.050 GAIN = 64
50
VS = 5V OUTPUT UNLOADED
GAIN CHANGE (dB)
GAIN (dB)
0.025 0
30
GAIN OF 32 GAIN OF 16
-3dB FREQUENCY (MHz)
GAIN = 8 GAIN = 1
-0.025 -0.050 -0.075 -0.100 -50 -25 50 25 TEMPERATURE (C) 0 75 100
6911 G010
LTC6911-2 Channel Isolation vs Frequency
120 CHANNEL-TO-CHANNEL ISOLATION (dB) 115 GAIN = 8 110 REJECTION (dB) GAIN = 1 105 100 95 90 85 100k FREQUENCY (Hz)
6911 G13
VOLTAGE NOISE DENSITY (nV/Hz)
VS = 5V VOUT = 1VRMS
GAIN = 64
LTC6911-2 Distortion vs Frequency with Light Loading (RL = 10k)
THD (AMPLITUDE BELOW FUNDAMENTAL) (dB) THD (AMPLITUDE BELOW FUNDAMENTAL) (dB)
-30 -40 -50 -60 GAIN = 64 -70 GAIN = 8 -80 GAIN = 1 -90 -100 0 50k 100k FREQUENCY (Hz)
6911 G16
VS = 2.5V VOUT = 1VRMS (2.83VP-P)
THD + NOISE (dB)
150k
UW
LTC6911-2 Frequency Response
VS = 5V VIN = 10mVRMS
LTC6911-2 -3dB Bandwidth vs Gain Setting
8.0 7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0
* * * * * * * *
1 10 GAIN
40 GAIN OF 64
VIN = 10mVRMS * VS = 2.7V * VS = 5V
20 GAIN OF 8 GAIN OF 4 10 GAIN OF 2 GAIN OF 1 0 -10 100
* *
*
*
100
6911 G12
1k
100k 10k FREQUENCY (Hz)
1M
10M
6911 G11
LTC6911-2 Power Supply Rejection vs Frequency
90 80 70 60 -SUPPLY 50 40 30 20 10 0
1M
LTC6911-2 Noise Density vs Frequency
VS = 2.5V GAIN = 1
100 VS = 2.5V TA = 25C INPUT REFERRED GAIN = 1
+SUPPLY
GAIN = 8 10 GAIN = 64
1k
10k
100k 1M FREQUENCY (Hz)
10M
6911 G14
1 1k
10k FREQUENCY (Hz)
100k
6911 G15
LTC6911-2 Distortion vs Frequency with Heavy Loading (RL = 500)
-30 -40 -50 GAIN = 8 -60 -70 -80 -90 -100 0 50k 100k FREQUENCY (Hz)
6911 G17
LTC6911-2 THD + Noise vs Input Voltage
-20 -30 -40 GAIN = 64 -50 GAIN = 8 -60 -70 -80
VS = 2.5V VOUT = 1VRMS (2.83VP-P) GAIN = 64
GAIN = 1
200k
150k
200k
-90 fIN = 1kHz -100 VS = 5V GAIN = 1 BW = 100Hz TO 22kHz -110 10n 1m 0.1 1 10 INPUT VOLTAGE (VP-P)
6911 G18
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LTC6911-1/LTC6911-2
PI FU CTIO S
INA (Pin 1): Analog Input. The input signal to the A channel amplifier of the LTC6911-X is the voltage difference between the INA and AGND pin. The INA pin connects internally to a digitally controlled resistance whose other end is a current summing point at the same potential as the AGND pin (Figure 1). At unity gain (digital input 001), the value of this input resistance is approximately 10k and the INA pin voltage range is rail-to-rail (V+ to V-). At gain settings above unity, the input resistance falls. The linear input range at INA also falls inversely proportional to the programmed gain. Tables 1 and 2 summarize this behavior. The higher gains are designed to boost lower level signals with good noise performance. In the "zero" gain state (digital input 000), analog switches disconnect the INA pin internally and this pin presents a very high input resistance. The input may vary from rail to rail in the "zero" gain setting, but the output is insensitive to it and is forced to the AGND potential.
G2 6 G1 5
V+ 10k AGND 2
MOS-INPUT OP AMP
V-
INB 3
691112 F01
INPUT R ARRAY
Figure 1. Block Diagram
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-
MOS-INPUT OP AMP
+
10k
+
-
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Circuitry driving the INA pin must consider the LTC6911-X's input resistance, its lot-to-lot variance, and the variation of this resistance from gain setting to gain setting. Signal sources with significant output resistance may introduce a gain error as the source's output resistance and the LTC6911-X's input resistance form a voltage divider. This is especially true at higher gain settings where the input resistance is the lowest. In single supply voltage applications, it is important to remember that the LTC6911-X's DC ground reference for both input and output is AGND, not V-. With increasing gains, the LTC6911-X's input voltage range for an unclipped output is no longer rail-to-rail but diminishes inversely to gain, centered about the AGND potential.
G0 4
CMOS LOGIC
INA 1
INPUT R ARRAY
FEEDBACK R ARRAY
10 OUTA
9 V-
8 OUTB
7 V+
FEEDBACK R ARRAY
LTC6911-1/LTC6911-2
PI FU CTIO S
AGND (Pin 2): Analog Ground. The AGND pin is at the midpoint of an internal resistive voltage divider, developing a potential halfway between the V+ and V- pins, with an equivalent series resistance to the pin of nominally 5k (Figure 1). AGND is also the noninverting input to both the internal channel A and channel B amplifiers. This makes AGND the ground reference voltage for the INA, INB, OUTA and OUTB pins. Recommended analog ground plane connection depends on how power is applied to the LTC6911-X (see Figures 2, 3 and 4). Single power supply applications typically use V- for the system signal ground. The analog ground plane in single supply applications should therefore tie to V-, and the AGND pin should be bypassed to this ground plane by a high quality capacitor of at least 1F (Figure 2). The AGND pin provides an internal analog reference voltage at half the V+ supply voltage. Dual supply applications with symmetrical supplies (such as 5V) have a natural system ground plane potential of zero volts, which can be tied directly to the AGND pin, making the zero volt ground plane the input and output reference voltage for the LTC6911-X (Figure 3). Finally, if dual asymmetrical power supplies are used, the supply ground is still the natural ground plane voltage. To maximize signal swing
V+ 0.1F
ANALOG GROUND PLANE
SINGLE-POINT SYSTEM GROUND
Figure 2. Single Supply Ground Plane Connection
U
U
U
capability with an asymmetrical supply, however, it is often desirable to refer the LTC6911-X's analog input and output to a voltage equidistant from the two supply rails V+ and V-. The AGND pin will provide such a potential when open-circuited and bypassed with a capacitor (Figure 4).
V- 0.1F V+ 0.1F
10
9
8
7
6
LTC6911-X
1 ANALOG GROUND PLANE
2
3
4
5
SINGLE-POINT SYSTEM GROUND
DIGITAL GROUND PLANE (IF ANY)
691112 F03
Figure 3. Dual Supply Ground Plane Connection
V- 0.1F
V+ 0.1F
10
9
8
7
6
10
9
8
7
6
LTC6911-X
LTC6911-X
1
2
3
4
+
5
1 ANALOG GROUND PLANE
2
3
4
5
1F
V REFERENCE 2
V + + V- REFERENCE 2 1F
DIGITAL GROUND PLANE (IF ANY)
691112 F02
SINGLE-POINT SYSTEM GROUND
DIGITAL GROUND PLANE (IF ANY)
691112 F04
Figure 4. Asymmetrical Dual Supply Ground Plane Connection
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LTC6911-1/LTC6911-2
PI FU CTIO S
In noise sensitive applications where AGND does not directly tie to a ground plane, as in Figures 2 and 4, it is important to AC-bypass the AGND pin. Otherwise, channel-to-channel isolation is degraded and wideband noise will enter the signal path from the thermal noise of the internal voltage divider resistors that present a Thevenin equivalent resistance of approximately 5k. This noise can reduce SNR by at least 3dB at high gain settings. An external capacitor from AGND to the ground plane, whose impedance is well below 5k at frequencies of interest, will filter and suppress this noise. A 1F high quality capacitor is effective for frequencies down to 1kHz. Larger capacitors extend this suppression to lower frequencies. This issue does not arise in dual supply applications because the AGND pin ties directly to ground. In applications requiring an analog ground reference other than half the total supply voltage, the user can override the built-in analog ground reference by tying the AGND pin to a reference voltage within the AGND voltage range specified in the Electrical Characteristics table. The AGND pin will load the external reference with approximately 5k returned to the half-supply potential. AGND should still be capacitively bypassed to a ground plane as noted above. Do not connect the AGND pin to the V- pin. INB (Pin 3): Analog Input. Refer to INA pin description. G0, G1, G2 (Pins 4, 5, 6): CMOS-Level Digital Gain Control Inputs. G2 is the most significant bit (MSB) and G0 is the least significant bit (LSB). These pins control the voltage gain settings for both channels (see Tables 1 and 2). Each channel's gain cannot be set independent of the other channel. The logic input pins (G pins) are allowed to swing from V- to 10.5V above V-, regardless of V+ so long as the logic levels meet the minimum requirements specified in the Electrical Characteristics table. The G0, G1 and G2 pins are high impedance CMOS logic inputs, but have small pull-down current sources (<10A) which will force both channels into the "zero" gain state (digital input 000) if the logic inputs are externally floated. No speed limitation is associated with the digital logic because it is memoryless and much faster than the analog signal path. V-, V+ (Pins 7, 9): Power Supply Pins. The V+ and V- pins should be bypassed with 0.1F capacitors to an adequate analog ground plane using the shortest possible wiring. Electrically clean supplies and a low impedance ground are important for the high dynamic range available from the LTC6911-X (see further details under the AGND pin description). Low noise linear power supplies are recommended. Switching power supplies require special care to prevent switching noise coupling into the signal path, reducing dynamic range. OUTB (Pin 8): Analog Output. This is the output of the B channel internal operational amplifier and can swing railto-rail (V+ to V-) as specified in the Electrical Characteristics table. The internal op amp remains active at all times, including the zero gain setting (digital input 000). For best performance, loading the output as lightly as possible will minimize signal distortion and gain error. The Electrical Characteristics table shows performance at output currents up to 10mA, and the current limits which occur when the output is shorted to mid-supply at 2.7V and 5V supplies. Signal outputs above 10mA are possible but current-limiting circuitry will begin to affect amplifier performance at approximately 20mA. Long-term operation above 20mA output is not recommended. Do not exceed a maximum junction temperature of 150C. The output will drive capacitive loads up to 50pF. Capacitances higher than 50pF should be isolated by a series resistor to preserve AC stability. OUTA (Pin 10): Analog Output. Refer to OUTB pin description.
14
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LTC6911-1/LTC6911-2
APPLICATIO S I FOR ATIO
Functional Description
The LTC6911-1/LTC6911-2 are small outline, wideband inverting 2-channel amplifiers whose voltage gain is digitally programmable. Each delivers a choice of eight voltage gains, controlled by the 3-bit digital parallel interface (G pins), which accept CMOS logic levels. The gain code is always monotonic; an increase in the 3-bit binary number (G2 G1 G0) causes an increase in the gain. Tables 1 and 2 list the nominal voltage gains for LTC6911-1 and LTC6911-2 respectively. Gain control within each amplifier occurs by switching resistors from a matched array in or out of a closed-loop op amp circuit using MOS analog switches (Figure 1). Bandwidth depends on gain setting. Curves in the Typical Performance Characteristics section show measured frequency responses. Digital Control Logic levels for the LTC6911-X digital gain control inputs (Pins 4, 5, 6) are nominally rail-to-rail CMOS, but can swing above V+ so long as the positive swing does not exceed 10.5V with respect to V-. Each logic input has a small pull-down current source which can sink up to 10A and is used to force the part into a gain of "zero" if the logic inputs are left unconnected. A logic 1 is nominally V+. A logic 0 is nominally V- or alternatively, 0V when using 5V supplies. The parts are tested with the values listed in the Electrical Characteristics table. Digital Input "High" and "Low" voltages are 10% and 90% of the nominal full excursion on the inputs. That is, the tested logic levels are 0.27V and 2.43V with a 2.7V supply, 0.5V and 4.5V with a 5V supply, and 0.5V and 4.5V with 5V supplies. Do not attempt to drive the digital inputs with TTL logic levels. TTL logic sources should be adapted with suitable pull-up resistors to V+ keeping in mind the internal pull-down current sources so that for a logic 1 they will swing to the positive rail.
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Timing Constraints Settling time in the CMOS gain-control logic is typically several nanoseconds and is faster than the analog signal path. When amplifier gain changes, the limiting timing is analog, not digital, because the effects of digital input changes are observed only through the analog output (Figure 1). The LTC6911-X's logic is static (not latched) and therefore lacks bus timing requirements. However, as with any programmable-gain amplifier, each gain change causes an output transient as the amplifier's output moves, with finite speed, toward a differently scaled version of the input signal. Varying the gain faster than the output can settle produces a garbled output signal. The LTC6911-X analog path settles with a characteristic time constant or time scale, , that is roughly the standard value for a first order band limited response: = 0.35/(2 f-3dB) See the -3dB BW vs Gain Setting graph in the Typical Performance Characteristics. Offset Voltage vs Gain Setting The Electrical Characteristics table lists DC gain dependent voltage offset error in two gain configurations. The voltage offsets listed, VOS(IN), are referred to the input pin (INA or INB). These offsets are directly related to the internal amplifier input voltage offset, VOS(OA), by the magnitude of programmed gain, G: G VOS(OA) = VOS(IN) 1 + G The input referred offset, VOS(IN), for any gain setting can be inferred from VOS(OA) and the gain magnitude, G. For example, an internal offset VOS(OA) of 1mV will appear referred to the INA and INB pins as 2mV at a gain setting
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LTC6911-1/LTC6911-2
APPLICATIO S I FOR ATIO
of 1, or 1.5mV at a gain setting of 2. At high gains, VOS(IN) approaches VOS(OA). (Offset voltage is random and can have either polarity centered on 0V.) The MOS input circuitry of the internal op amp in Figure 1 draws negligible input currents (unlike some op amps), so only VOS(OA) and G affect the overall amplifier's offset. AC-Coupled Operation Adding capacitors in series with the INA and INB pins convert the LTC6911-X into a dual AC-coupled inverting amplifier, suppressing the input signal's DC level (and also adding the additional benefit of reducing the offset voltage from the LTC6911-X's amplifier itself). No further components are required because the input of the LTC6911-X biases itself correctly when a series capacitor is added. The INA and INB analog input pins connect internally to a resistor whose nominal value varies between 10k and 1k depending on the version of LTC6911 used (see the rightmost column of Tables 1 and 2). Therefore, the low frequency cutoff will vary with capacitor and gain setting. For example, if a low frequency corner of 1kHz or lower on the LTC6911-1 is desired, use a series capacitor of 0.16F or larger. A 0.16F capacitor has a reactance of 1k at 1kHz, giving a 1kHz lower -3dB frequency for gain settings of 10V/V through 100V/V. If the LTC6911-1 is operated at lower gain settings with an 0.16F capacitor, the higher input resistance will reduce the lower corner frequency down to 100Hz at a gain setting of 1V/V. These frequencies scale inversely with the value of the input capacitor used. Note that operating the LTC6911 family in "zero" gain mode (digital inputs 000) open circuits the INA and INB pins and this demands some care if employed with a series AC-coupled input capacitor. When the chip enters the zero gain mode, the opened INA or INB pin tends to sample and freeze the voltage across the capacitor to the value it held just before the zero gain state. This can place the INA or INB pin at or near the DC potential of a supply rail (the INA or INB pin may also drift to a supply potential in this state
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due to small junction leakage currents). To prevent driving the INA or INB pin outside the supply limit and potentially damaging the chip, avoid AC input signals in the zero gain state with an AC-coupled capacitor. Also, switching later to a nonzero gain value will cause a transient pulse at the output of the LTC6911-1 (with a time constant set by the capacitor value and the new LTC6911-1 input resistance value). This occurs because the INA and INB pins return to the AGND potential forcing transient current sourced by the amplifier output to charge the AC-coupling capacitor to its proper DC blocking value. SNR and Dynamic Range The term "dynamic range" is much used (and abused) with signal paths. Signal-to-noise ratio (SNR) is an unambiguous comparison of signal and noise levels, measured in the same way and under the same operating conditions. In a variable gain amplifier, however, further characterization is useful because both noise and maximum signal level in the amplifier will vary with the gain setting, in general. In the LTC6911-X, maximum output signal is independent of gain (and is near the full power supply voltage, as detailed in the Swing sections of the Electrical Characteristics table). The maximum input level falls with increasing gain, and the input-referred noise falls as well (as also listed in the table). To summarize the useful signal range in such an amplifier, we define Dynamic Range (DR) as the ratio of maximum input (at unity gain) to minimum input-referred noise (at maximum gain). This DR has a physical interpretation as the range of signal levels that will experience an SNR above unity V/V or 0dB. At a 10V total power supply, DR in the LTC6911-X (gains 0V/V to 100V/V) is typically 120dB (the ratio of a nominal 9.9VP-P, or 3.5VRMS (maximum input), to the 3.8VRMS (high gain input noise). The SNR of an amplifier is the ratio of input level to input-referred noise, and can be 110dB with the LTC6911 family at unity gain.
sn691112 691112fs
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LTC6911-1/LTC6911-2
APPLICATIO S I FOR ATIO
Construction and Instrumentation Cautions Electrically clean construction is important in applications seeking the full dynamic range of the LTC6911 family of dual amplifiers. It is absolutely critical to have AGND either AC bypassed or wired directly, using the shortest possible wiring, to a low impedance ground return for best channelto-channel isolation. Short, direct wiring will minimize parasitic capacitance and inductance. High quality supply bypass capacitors of 0.1F near the chip provide good decoupling from a clean, low inductance power source. But several cm of wire (i.e., a few microhenrys of inductance) from the power supplies, unless decoupled by
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substantial capacitance (>10F) near the chip, can create a high-Q LC resonance in the hundreds of kHz in the chip's supplies or ground reference. This may impair circuit performance at those frequencies. A compact, carefully laid out printed circuit board with a good ground plane makes a significant difference in minimizing distortion and maximizing channel isolation. Finally, equipment to measure amplifier performance can itself add to distortion or noise floors. Checking for these limits with wired shorts from INA to OUTA and INB to OUTB in place of the chip is a prudent routine procedure.
sn691112 691112fs
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LTC6911-1/LTC6911-2
TYPICAL APPLICATIO
Expanding an ADC's Dynamic Range Figure 5 shows a compact 2-channel data acquisition system for wide ranging input levels. This figure combines an LTC6911-X programmable amplifier (10-lead MSOP) with an LTC1865 analog-to-digital converter (ADC) in an 8-lead MSOP. This ADC has 16-bit resolution and a
V+ 0.1F 9
VINA AGND 1F
1
2
VINB
3
Figure 5. Expanding a Dual Channel ADC's Dynamic Range
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maximum sampling rate of 250ksps. An LTC6911-1, for example, expands the ADC's input amplitude range by 40dB while operating from the same single 5V supply. The 499 resistor and 270pF capacitor couple cleanly between the LTC6911-X's output and the switched-capacitor inputs of the LTC1865.
7 V+ 0.1F 10 499 270pF CH0 LTC6911-X CH1 8 499 270pF GND LTC1865 SCK SDO SDI
691112 F05
VCC
CONV
ADC INTERFACE
691112 F05
4
5
6
GAIN CONTROL
sn691112 691112fs
LTC6911-1/LTC6911-2
PACKAGE DESCRIPTIO
5.23 (.206) MIN
0.50 0.305 0.038 (.0197) (.0120 .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT
0.254 (.010) GAUGE PLANE
0.18 (.007) SEATING PLANE 0.17 - 0.27 (.007 - .011) TYP 0.127 0.076 (.005 .003)
MSOP (MS) 0603
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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MS Package 10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
0.889 0.127 (.035 .005) 3.20 - 3.45 (.126 - .136) 3.00 0.102 (.118 .004) (NOTE 3) 10 9 8 7 6 0.497 0.076 (.0196 .003) REF DETAIL "A" 0 - 6 TYP 12345 0.53 0.152 (.021 .006) DETAIL "A" 1.10 (.043) MAX 0.86 (.034) REF 4.90 0.152 (.193 .006) 3.00 0.102 (.118 .004) (NOTE 4) 0.50 (.0197) BSC
sn691112 691112fs
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LTC6911-1/LTC6911-2
TYPICAL APPLICATIO
Fully Differential Amplifier with Digitally Programmable Gain
High Dynamic Range (PGA Input)
-5V 0.1F
VIN+ VIN-
VIN+ VIN- 5V 1 LTC1992-1 OR 7 2 LTC1992-2 OR 6 3 LTC1992-5 OR 5 4 LTC1992-10 8 -5V 1 2 LTC6911-1 OR 4 LTC6911-2 5 3 10 9 8 7 6
0.1F
RELATED PARTS
PART NUMBER LT 1228 LT1251/LT1256 LTC1564 LTC6910 LTC6915
(R)
DESCRIPTION 100MHz Gain Controlled Transconductance Amplifier 40MHz Video Fader and Gain Controlled Amplifier 10kHz to 150kHz Digitally Controlled Filter and PGA Digitally Controlled Programmable Gain Amplifier in SOT-23 Digitally Controlled Programmable Instrumentation Amplifier with SPI Interface
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
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1 2 LTC6911-1 OR 4 LTC6911-2 5 3 10 9 8 7 6 0.1F 5V 8 LTC1992-1 OR 2 7 LTC1992-2 OR 3 6 LTC1992-5 OR 0.1F 4 5 LTC1992-10 1 -5V VOUT+ VOUT- G0 G1 G2 DIGITAL GAIN CONTROL 0.1F
High CMRR (Differential Input)
-5V 0.1F VOUT+ VOUT-
5V
0.1F
0.1F
691112 TA03
G0 G1 G2 DIGITAL GAIN CONTROL
COMMENTS Differential Input, Continuous Analog Gain Control Two Input, One Output, Continuous Analog Gain Control Continuous Time, Low Noise 8th Order Filter and 4-Bit PGA Single Channel Version of the LTC6911 14 Bits of Gain Control
sn691112 691112fs LT/TP 0104 1K * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2004


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